Dependencies commands running (THIS IS A BUG) - make 3.81

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Dependencies commands running (THIS IS A BUG) - make 3.81

ruchi
NUMJOBS := 24
MAKEFLAGS := -j3 -l36

SUBDIRS := a  \
                  b  \
                  c

.PHONY $(SUBDIRS)
$(SUBDIRS) : $(SOME_INITIAL_WORK)
c : a b
$(SUBDIRS):
             @echo "=> Working on '$@' for '$(ARCH)'..."
             $(NOERR)+cd $(DIR) &&  time ./<script>

On executing parallel make , only targets "a" and "b" are built and target "c" totally skipped..not even goes to echo statement of $(SUBDIRS) rule.
In make -d -p command output get the following:
c: a b
#  Phony target (prerequisite of .PHONY).
#  Implicit rule search has not been done.
#  File does not exist.
#  File has not been updated.
#  Dependencies commands running (THIS IS A BUG).

On adding some 10-15 targets in between "b" and "c" target, the above BUG doesn't comes and everything builds fine.
SUBDIRS := a  \
                  b  \
                  d e f ........l..m   \
                  c
Tried adding pipe , removing PHONY  and many other ways but of no respite.Please help what can be the reason and some proper way to solve this.
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Re: Dependencies commands running (THIS IS A BUG) - make 3.81

Paul Smith-20
On Mon, 2017-02-13 at 20:43 -0800, ruchi wrote:

> NUMJOBS := 24
> MAKEFLAGS := -j3 -l36
>
> SUBDIRS := a  \
>                   b  \
>                   c
>
> .PHONY $(SUBDIRS)
> $(SUBDIRS) : $(SOME_INITIAL_WORK)
> c : a b
> $(SUBDIRS):
>              @echo "=> Working on '$@' for '$(ARCH)'..."
>              $(NOERR)+cd $(DIR) &&  time ./<script>

Please provide an actual working example that shows your problem.  This
makefile is malformed and has lots of missing variable assignments, etc.

I tried to condense it down into a reproducible test case but it worked
for me both with GNU make 3.81 and the latest make:

  $ cat Makefile

  SUBDIRS := a b c

  .PHONY: $(SUBDIRS)
  c : a b
  $(SUBDIRS):
        @echo "=> Working on '$@'..."
        +cd $@ && sleep 2

  $ mkdir -p a b c

  $ make-3.81 -j3 c
  => Working on 'a'...
  => Working on 'b'...
  cd a && sleep 2
  cd b && sleep 2
  => Working on 'c'...
  cd c && sleep 2

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Re: Dependencies commands running (THIS IS A BUG) - make 3.81

ruchi

Hi Paul

Thanks for looking into it.

It would be difficult for me to share the exact Makefile as its quite complex having around 70-80 targets.


The thing is each target is itself having various subdirectories and its calling recursive submakes on those as well via the 
script which we are passing in "$(NOERR)+cd $(DIR) &&  time ./<script>" 

We are calling make for 2 archs (x86 and arm) , so in all there should be 6 invocations when make is executed for 
3 targets ( a , b ,c) where one of those is a dependent target.
But in our case only 4 invocations happens for a,b respectively and c is totally ignored with the reason 
"Dependencies commands running (THIS IS A BUG)"

When for jobslots 3 , if I add only 2 targets ( b, c) and their dependency b:c ,so in this case 4 invocations is there and everything works fine.

When I increase the job slots (j=24 or 32) everything works fine and all dependent modules ( 4-5) builds successfully.

Seems like some issue with the invocations for dependent targets, when the number of targets is equal or more than the number of job slots.
Any pointer in this regard?

Thanks and Regards
Ruchi



From: Paul Smith <[hidden email]>
Sent: Tuesday, February 14, 2017 10:53:20 AM
To: ruchi; [hidden email]
Subject: Re: Dependencies commands running (THIS IS A BUG) - make 3.81
 
On Mon, 2017-02-13 at 20:43 -0800, ruchi wrote:
> NUMJOBS := 24
> MAKEFLAGS := -j3 -l36
>
> SUBDIRS := a  \
>                   b  \
>                   c
>
> .PHONY $(SUBDIRS)
> $(SUBDIRS) : $(SOME_INITIAL_WORK)
> c : a b
> $(SUBDIRS):
>              @echo "=> Working on '$@' for '$(ARCH)'..."
>              $(NOERR)+cd $(DIR) &&  time ./<script>

Please provide an actual working example that shows your problem.  This
makefile is malformed and has lots of missing variable assignments, etc.

I tried to condense it down into a reproducible test case but it worked
for me both with GNU make 3.81 and the latest make:

  $ cat Makefile

  SUBDIRS := a b c

  .PHONY: $(SUBDIRS)
  c : a b
  $(SUBDIRS):
        @echo "=> Working on '$@'..."
        +cd $@ && sleep 2

  $ mkdir -p a b c

  $ make-3.81 -j3 c
  => Working on 'a'...
  => Working on 'b'...
  cd a && sleep 2
  cd b && sleep 2
  => Working on 'c'...
  cd c && sleep 2

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Re: Dependencies commands running (THIS IS A BUG) - make 3.81

ruchi
In reply to this post by Paul Smith-20
Hi Paul
Thanks for looking into it.
It would be difficult for me to share the exact Makefile as its quite complex having around 70-80 targets.

 
The thing is each target is itself having various subdirectories and its calling recursive submakes on those as well via the
script which we are passing in "$(NOERR)+cd $(DIR) &&  time ./<script>"

We are calling make for 2 archs (x86 and arm) , so in all there should be 6 invocations when make is executed for
3 targets ( a , b ,c) where one of those is a dependent target.
But in our case only 4 invocations happens for a,b respectively and c is totally ignored with the reason
"Dependencies commands running (THIS IS A BUG)"

When for jobslots 3 , if I add only 2 targets ( b, c) and their dependency b:c ,so in this case 4 invocations is there and everything works fine.

When I increase the job slots (j=24 or 32) everything works fine and all dependent modules ( 4-5) builds successfully.

Seems like some issue with the invocations for dependent targets, when the number of targets is equal or more than the number of job slots.
Any pointer in this regard?

Thanks and Regards
Ruchi
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Re: Dependencies commands running (THIS IS A BUG) - make 3.81

Paul Smith-20
On Mon, 2017-02-13 at 22:22 -0800, ruchi wrote:
> Hi Paul
> Thanks for looking into it.

I'm not sure what aspect of your mail software is causing your messages
to be sent twice, about 8 minutes apart, but it would be helpful if you
could disable it.

> It would be difficult for me to share the exact Makefile as its quite
> complex having around 70-80 targets.

We have no interest in your exact makefile.  What I suggested was that
you create a makefile that (a) works and (b) shows the problem you're
seeing.  I'm talking about a SSCCE: http://sscce.org/

For GNU make problems you don't even need source code, you can replace
compilers with "touch" statements or sleep statements or echo or
whatever.

> The thing is each target is itself having various subdirectories and its
> calling recursive submakes on those as well via the
> script which we are passing in "$(NOERR)+cd $(DIR) &&  time ./<script>"
>
> We are calling make for 2 archs (x86 and arm) , so in all there should be 6
> invocations when make is executed for
> 3 targets ( a , b ,c) where one of those is a dependent target.
> But in our case only 4 invocations happens for a,b respectively and c is
> totally ignored with the reason
> "Dependencies commands running (THIS IS A BUG)"

Without an actual example I can't be sure how you have implemented this,
but one thing to note is that make will only ever run any given target
one time within a single invocation of make, no matter how many times it
appears as a prerequisite.

So for example if you have:

  all: foo bar

  foo: c
  bar: c

then "c" will only be built one time per invocation of make, even though
it appears as a prerequisite to two different targets.  Marking targets
PHONY has no impact on this: they're still only built once.

If that doesn't help explain the behavior you're seeing, you'll need to
provide a working example.

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