Hmm, I don't read that as acting like a double-colon rule.
Instead, GNU Make does this:
1. You asked for a.o and b.o.
2. The Makefile has a rule that makes %.o from %.c, and one that makes %.o
3. GNU Make looks for a.c and finds it, then uses recipe #1 for a.o.
4. GNU Make looks for b.c and doesn't find it.
5. GNU Make looks for b.d and finds it, then uses recipe #2 for b.o.
A double-colon rule would execute both recipes for each target, which this
example clearly doesn't do.
> % cat Makefile
> %.o: %.c
> touch $@
> %.o: %.d
> touch $@
> % rm -f a.o b.o; touch a.c b.d; make a.o b.o
> removed 'a.o'
> removed 'b.o'
> touch a.o
> touch b.o
> The behavior is similar to double-colon rules. It can not be explained
> > If more than one rule gives a recipe for the same file, make uses the
> > last one given and prints an error message.
> https://www.gnu.org/software/make/manual/html_node/Multiple-Rules.html#Multiple-Rules >
> Context: I intend to use such multiple rules for one %.o target in an
> lldb Makefile https://reviews.llvm.org/D94890 >
If it helps you can think of explicit rules like classes in C++: there
can be only one with that name. Pattern rules are like templates in
C++: each template must be different (can't have exactly the same set
of target and prerequisite patterns) but they can apply to a large
number of different targets. The section above shows how make chooses
which implicit rule (template) to apply in a given situation.