Make execute twice the same dependency

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Make execute twice the same dependency

Emmanuel Mayssat
Sample code:

echo:
   echo "toto"
target: echo echo                           # echo to be executed twice


is there a way to execute the echo target twice in the same make command?
make target only prints echo one.
An obvious work around is to use 'make echo; make echo' but is there a way to do this with one make call?


--
Emmanuel
Menlo Security, Inc.
Menlo Park, CA


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Re: Make execute twice the same dependency

Paul Smith-20
On Mon, 2016-10-10 at 14:12 -0700, Emmanuel Mayssat wrote:
> Sample code:
>
> echo:
>    echo "toto"
> target: echo echo                           # echo to be executed twice
>
>
> is there a way to execute the echo target twice in the same make command?

There is no way to do this with targets.  Make considers each target to
have been fully completed when it runs the recipe for that target, even
if the target file is not actually generated.  It will only ever try to
build a given target one time in any given execution of make.

If you gave an idea of what you're really trying to do we might be able
to advise you on a better way to do it.

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