my rules are ignored in favour of implicit rules.

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my rules are ignored in favour of implicit rules.

Gnu - Make - Help mailing list
i have one object .o and one executable. if the object .o is build then my
own rule for executable is used, otherwise implicit rule is used:

cc=gcc -Wall -Wextra ..
ln=-lxxx
os=x.o
xs=m

%: %.c $(os)
 cc -o $@ $^ $(ln)

%.o: %.c %.h
 $(cc) -o $@ -c $<

make x.o ; make m     ## works fine
make                          ## uses implicit rule     'CC m.c -o m'

i never before had such problems. i used it that way for years.
thank you in advance.
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Re: my rules are ignored in favour of implicit rules.

Paul Smith-20
On Sun, 2019-10-20 at 00:14 +0200, andreas graeper via Help-make wrote:

> i have one object .o and one executable. if the object .o is build then my
> own rule for executable is used, otherwise implicit rule is used:
>
> cc=gcc -Wall -Wextra ..
> ln=-lxxx
> os=x.o
> xs=m
>
> %: %.c $(os)
>    cc -o $@ $^ $(ln)
>
> %.o: %.c %.h
>    $(cc) -o $@ -c $<
>
> make x.o ; make m     ## works fine
> make                  ## uses implicit rule 'CC m.c -o m'

Sorry but I don't understand the problem.

Given the above makefile, running "make" with no arguments as in your
second example would simply print "nothing to do" because you have not
created any explicit targets at all.

This leads me to believe that either the makefile you show or the
description of your problem is not accurately describing your real
situation.

When make doesn't build what you expect I typically recommend running
it with the "-d" option and searching through the output to determine
why make gave up on the rule you expected it to use.


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